h1. Schematics

h2. Top level

!{width: 80%}QM_SOLO_LFR-01.08-TOP.jpg(Top level)!

h2. Power supply

!{width: 80%}QM_SOLO_LFR-01.08-PWR.jpg(Top level)!

h2. Input buffer

!{width: 80%}QM_SOLO_LFR-01.08-BUFF.jpg(Top level)!

!{width: 80%}QM_SOLO_LFR-01.08-AN.jpg(Top level)!


h2. Bias fail multiplexers

!{width: 80%}QM_SOLO_LFR-01.08-BFAIL.jpg(Top level)!

h2. ADCs

!{width: 80%}QM_SOLO_LFR-01.08-ADC.jpg(Top level)!

h2. Search Coil callibration

!{width: 80%}QM_SOLO_LFR-01.08-CAL.jpg(Top level)!

h2. Housekeepings

!{width: 80%}QM_SOLO_LFR-01.08-HK.jpg(Top level)!

h2. FPGA

!{width: 80%}QM_SOLO_LFR-01.08-FPGA.jpg(Top level)!

h2. SRAM

!{width: 80%}QM_SOLO_LFR-01.08-SRAM.jpg(Top level)!

h2. Spacewire

!{width: 80%}QM_SOLO_LFR-01.08-SPW.jpg(Top level)!


h2. Changelog

!{width: 80%}QM_SOLO_LFR-01.08-Changelog.jpg(Top level)!