FPGA Pinout » History » Revision 6
Revision 5 (Jean-Christophe Pellion, 26/11/2013 05:01 PM) → Revision 6/9 (Jean-Christophe Pellion, 26/11/2013 05:25 PM)
h1. Pinout
h2. Clocks
|_.Net |_.Direction |_.FPGA pin |
|clk_50 |Input |F7 |
|clk_49 |Input |K14 |
h2. Push Buttons
|_.Net |_.Direction |_.FPGA pin |
|BP0 |Input |L1 |
|BP1 |Input |R1 |
|BP2/reset |Input |T2 |
h2. Leds
|_.Net |_.Direction |_.FPGA pin |
|LED0 |output |V6 |
|LED1 |output |V5 |
|LED2 |output |T4 |
h2. Uarts
|_.Net |_.Direction |_.FPGA pin |
|\3=.UART1 |
|TXD1 |input |N17 |
|RXD1 |output |N18 |
|nCTS1 |output |P18 |
|nRTS1 |input |P17 |
|\3=.UART2 |
|TXD2 |input |P13 |
|RXD2 |output |T18 |
|nCTS2 |output |V17 |
|nDTR2 |input |L15 |
|nRTS2 |input |M15 |
|nDCD2 |output |N15 |
h2. Ext Connector
|_.Net |_.Direction |_.FPGA pin |
|IO0 |input/output |E4 |
|IO1 |input/output |D3 |
|IO2 |input/output |C2 |
|IO3 |input/output |D1 |
|IO4 |input/output |F2 |
|IO5 |input/output |F3 |
|IO6 |input/output |G2 |
|IO7 |input/output |H3 |
|IO8 |input/output |H4 |
|IO9 |input/output |J2 |
|IO10 |input/output |P1 |
|IO11 |input/output |N1 |
h2. SpaceWire
|_.Net |_.Direction |_.FPGA pin |
|SPW_EN |output |R12 |
|\3=.SpaceWire Nominal |
|SWP_NOM_DIN |input |R10 |
|SWP_NOM_SIN |input |R13 |
|SWP_NOM_DOUT |output |T13 |
|SWP_NOM_SOUT |output |T10 |
|\3=.SpaceWire Redundant |
|SWP_RED_DIN |input |U18 |
|SWP_RED_SIN |input |T12 |
|SWP_RED_DOUT |output |U10 |
|SWP_RED_SOUT |output |P16 |
h2. ADC
|_.Net |_.Direction |_.FPGA pin |
|ADC_nCS |output |K1 |
|ADC_CLK |output |T1 |
|ADC_SDO(0 to 7) |output |V4 (0)
V3
V2
U1
J1
H1
F1
E1 (7) |
h2. SRAM
|_.Net |_.Direction |_.FPGA pin |
|SRAM_nWE |output | C13 |
|SRAM_CE |output | J14 |
|SRAM_nOE |output | B9 |
|SRAM_nBE(0 to 3) |output | H15 (0)
C12
A10
A9 (3)|
|SRAM_A(0 to 19) |output | C11 (0)
C10
C9
C8
C7
A5
A6
B6
B7
A8
B10
A11
B12
A13
B13
C18
C17
B18
C16
D15 (19)|
|SRAM_DQ0 to 31) |input-output |D16 (0)
D18
E15
E18
F15
F18
G15
G17
K15
J18
J15
H18
C3
D4
D5
C6
D14
A15
C15
B17
A17
B16
A16
A14
A4
A3
A2
B1
C1
B2
B3
C4 (31)|