Bug #957
closedErroneous PA_LFR_RW_MASK_F2_WORD2 on TM_LFR_PARAMETER_DUMP when RW Freq = 96.0hz
0%
Description
A nouveau, la fonction de calcul de masque ne donne pas la bonne valeur.
Le script utilisé /home/validation/SCRIPT/R3++/test_rw_one_freq_96.py envoie une TC_LFR_UPDATE_INFO avec CP_RPW_SC_RW1_F1 à 96.0 hz et nan dans toutes les autres valeurs.
Aucune TC_LOAD_FILTER_PAR n a ete envoyée.
13:46:33.997939, TC_LFR_UPDATE_INFO, CP_RPW_SC_RW1_F1=1119944703, CP_RPW_SC_RW1_F2=2147483647, CP_RPW_SC_RW1_F3=2147483647, CP_RPW_SC_RW1_F4=2147483647, CP_RPW_SC_RW2_F1=2147483647, CP_RPW_SC_RW2_F2=2147483647, CP_RPW_SC_RW2_F3=2147483647, CP_RPW_SC_RW2_F4=2147483647, CP_RPW_SC_RW3_F1=2139160575, CP_RPW_SC_RW3_F2=2147483647, CP_RPW_SC_RW3_F3=2147483647, CP_RPW_SC_RW3_F4=2147483647, CP_RPW_SC_RW4_F1=2147483647, CP_RPW_SC_RW4_F2=2147483647, CP_RPW_SC_RW4_F3=2147483647, CP_RPW_SC_RW4_F4=2147483647
La TM_LFR_HK positionne correctement le flag a enabled
13:46:34.693412, TM_LFR_HK, HK_LFR_SC_RW1_F1_FLAG: ENABLED = 1, HK_LFR_SC_RW1_F2_FLAG: DISABLED = 0, HK_LFR_SC_RW1_F3_FLAG: DISABLED = 0, HK_LFR_SC_RW1_F4_FLAG: DISABLED = 0, HK_LFR_SC_RW2_F1_FLAG: DISABLED = 0, HK_LFR_SC_RW2_F2_FLAG: DISABLED = 0, HK_LFR_SC_RW2_F3_FLAG: DISABLED = 0, HK_LFR_SC_RW2_F4_FLAG: DISABLED = 0, HK_LFR_SC_RW3_F1_FLAG: DISABLED = 0, HK_LFR_SC_RW3_F2_FLAG: DISABLED = 0, HK_LFR_SC_RW3_F3_FLAG: DISABLED = 0, HK_LFR_SC_RW3_F4_FLAG: DISABLED = 0, HK_LFR_SC_RW4_F1_FLAG: DISABLED = 0, HK_LFR_SC_RW4_F2_FLAG: DISABLED = 0, HK_LFR_SC_RW4_F3_FLAG: DISABLED = 0, HK_LFR_SC_RW4_F4_FLAG: DISABLED = 0
La TM_LFR_PARAMETER_DUMP montre les masques calculés
13:46:37.001817, TM_LFR_PARAMETER_DUMP,
PA_LFR_RW_MASK_F0_WORD1=0xffffffff, PA_LFR_RW_MASK_F0_WORD2=0xffffffff, PA_LFR_RW_MASK_F0_WORD3=0xffffffff, PA_LFR_RW_MASK_F0_WORD4=0xfffffffc, PA_LFR_RW_MASK_F1_WORD1=0xffffffff, PA_LFR_RW_MASK_F1_WORD2=0xffffffff, PA_LFR_RW_MASK_F1_WORD3=0xffffffff, PA_LFR_RW_MASK_F1_WORD4=0xffffff8f, PA_LFR_RW_MASK_F2_WORD1=0xfffffffe, PA_LFR_RW_MASK_F2_WORD2=0x7fffffff, PA_LFR_RW_MASK_F2_WORD3=0xffffffff, PA_LFR_RW_MASK_F2_WORD4=0xffffffff
Hors si on regarde le #867 les masques avaient été correctement calculés et montraient
PA_LFR_RW_MASK_F2_WORD2=0x3fffffff
Les fichiers de logs (2017_03_03-13_46_44*) se trouvent dans le répertoire /home/validation/data/R3++/3.2.0.2/1.1.91/TEST-UNITAIRES/test_rw_one_freq_96
Contexte du test
----------------
FSW 3.2.0.2
VHDL 1.1.91
EM1 sans Timegen
SocExplorerEngine.getSocExplorer: Version = 0.7.0, Branch = 0.6, Changeset = c459540a6dbd+
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