void reset_waveform_picker_regs_vhdl_dev_debug_64()
{
    /** This function resets the waveform picker module registers.
    *
    * The registers affected by this function are located at the following offset addresses:
    * - 0x00 data_shaping
    * - 0x04 run_burst_enable
    * - 0x08 addr_data_f0
    * - 0x0C addr_data_f1
    * - 0x10 addr_data_f2
    * - 0x14 addr_data_f3
    * - 0x18 status
    * - 0x1C delta_snapshot
    * - 0x20 delta_f0
    * - 0x24 delta_f0_2
    * - 0x28 delta_f1
    * - 0x2c delta_f2
    * - 0x30 nb_data_by_buffer
    * - 0x34 nb_snapshot_param
    * - 0x38 start_date
    * - 0x3c nb_word_in_buffer
    *
    */
    waveform_picker_regs->data_shaping = 0x01; // 0x00 *** R1 R0 SP1 SP0 BW
    waveform_picker_regs->run_burst_enable = 0x00; // 0x04 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ]
    //waveform_picker_regs->addr_data_f0 = (int) (wf_snap_f0); // 0x08
    waveform_picker_regs->addr_data_f0 = current_ring_node_f0->buffer_address; // 0x08
    waveform_picker_regs->addr_data_f1 = current_ring_node_f1->buffer_address; // 0x0c
    waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address; // 0x10
    waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_a); // 0x14
    waveform_picker_regs->status = 0x00; // 0x18
    //
    waveform_picker_regs->delta_snapshot = 0x80;    // 0x1c *** 128
    waveform_picker_regs->delta_f0 = 0x60;          // 0x20 *** 128 - 32 = 96
    waveform_picker_regs->delta_f0_2 = 0x7;         // 0x24 *** 7 [7 bits]
    waveform_picker_regs->delta_f1 = 0x62;          // 0x28 *** 128 - 30 = 90
    waveform_picker_regs->delta_f2 = 0x60;          // 0x2c *** 192
    // 128
    waveform_picker_regs->nb_data_by_buffer = 0x3f;     // 0x30 *** 64 - 1 => nb samples -1
    waveform_picker_regs->snapshot_param = 0x40;        // 0x34 *** 64 => nb samples
    waveform_picker_regs->start_date = 0x00;            // 0x38
    waveform_picker_regs->nb_word_in_buffer = 0xc2;    // 0x3c *** 64 * 3 + 2 = 194
}